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december 2008 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 sg6510x1 ? pc power supply supervisors sg6510x1 ? pc power supply supervisors features ? over-voltage protection (ovp) for 3.3v, 5v, 12v ? under-voltage sense (uvs) and under-voltage protection (uvp) for 3.3v, 5v ? open-drain output for pgo and fpo pins ? 300ms power-good delay ? 75ms turn-on delay for 3.3v and 5v ? 2.8ms pson control to fpo turn-off delay ? 38ms /38ms pson control debounce ? 350 s width noise deglitches ? 2ms uvp debounce time ? 1ms uvs debounce time ? no lockup during the fast ac power on/off ? brownout protection function for 3.3v and 5v ? wide supply voltage range from 4v to 15v description sg6510 is designed to provide the voltage supervisor function, remote on/off pson function, power-good (pgo) indicator function, and fault protection (fpo) function for switching power systems. for the supervisor function, it provides the over-voltage protection (ovp) monitoring for 3.3v, 5v, and 12v (12v via vdd pin); under-voltage s ense (uvs) monitoring for 3.3v and 5v; and under-voltage protection (uvp) monitoring for 3.3v and 5v. when 3.3v or 5v voltage is decreasing to 2.8v and 4.2v, respectively, the under- voltage sense (uvs) function is enabled to reset the pgo signal from high to low. if 3.3v or 5v voltage is further decreasing to 2.5v and 3.6v, respectively, fpo is set high to turn off the pwm controller ic. to achieve better immunity for lighting surge glitch and to prevent accidental power shut down during dynamic loading condition, the debounce time for uvp and uvs is 2ms/1ms, respectively. the deglitch time for ovp is 75s for better noise immunity. during an ac sag or brownout situation, uvp functions can still be enabled to protect power supply in case of output short circuit. the power supply is turned on after 38ms debounce time when the pson signal is set from high to low. to turn off the power supply, the pson signal is set from low to high and the debounce time is 38ms. the pgi circuitry provides a sufficient power-down warning signal for pgo. when pgi input is lower than the internal 1.2v reference voltage, after 350 s debounce time, the pgo signal is pulled low. ordering information part number operating temperature range package eco status packing method SG6510DY1 -40 c to +125 c dip-8 green tube sg6510dz1 -40 c to +125 c dip-8 rohs tube sg6510sz1 -40 c to +125 c sop-8 rohs tape & reel sg6510sy1 -40 c to +125 c sop-8 green tape & reel for fairchild?s definition of ?green? please visit: http://www.fairchildsemi.com/com pany/green/rohs_green.html .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 2 sg6510x1 ? pc power supply supervisors application diagram sg6510 1 2 3 4 5 6 7 8 pgi gnd fpo pson vs33 vs5 vdd pgo pgi 5v 5v 12v pson 3.3v 5v 5vsb figure 1. typical application
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 3 sg6510x1 ? pc power supply supervisors internal block diagram figure 2. functional block diagram
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 4 sg6510x1 ? pc power supply supervisors timing diagram
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 5 sg6510x1 ? pc power supply supervisors marking information marking for sg6510dz1 (pb-free) sg6510sz1 (pb-free) marking for SG6510DY1 (green-compound) sg6510sy1 (green-compound) figure 3. top mark 1?st line z: assembly plant code x: year code y: week code tt: die run code 3?rd line t: package type (d = dip, s=sop) p: y=green package m: manufacture flow code 8 1 sg6510tp1 xxxxxxxyywwv t : d = dip p: z = lead free null = regular package xxxxxxx : wafer lot yy : year; ww : week v : assembly location
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 6 sg6510x1 ? pc power supply supervisors pin configurations figure 4. pin configuration pin definitions pin # name type description 1 pgi analog input power-good input. for atx smps, it detects main ac voltage under- voltage and/or failure. 2 gnd supply ground. 3 fpo logic output fault protection output (invert). output signal to control the pwm ic. for example, it controls the pwm ic of primary side through an opto- coupler. when fpo is low, the main smps is operational. 4 pson logic input remote on/off logic input from cpu or main-board. turn on/off the pwm output after a 38ms delay. 5 vs33 analog input 3.3 v over/under-voltage control sense input. 6 vs5 analog input 5 v over/under-voltage control sense input. 7 vdd supply supply voltage; 4v ~ 15v. for atx smps, it is connected to 5v- standby and 12v through diodes, respectively. 8 pgo logic output power-good logic output, 0 or 1(open-drain). power good = 1 means that the power is good for operation. the power-good delay is 300ms. vs5 pgo vdd pson fpo pgi gnd vs33
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 7 sg6510x1 ? pc power supply supervisors function table pgi pson uv sense (3.3v or 5v) uv protection (3.3v or 5v) ov protection fpo pgo pgi<1.2v l no no no l l pgi<1.2v l yes no no l l pgi<1.2v l no yes no l l pgi<1.2v l no no yes h l pgi<1.2v l yes yes no l l pgi<1.2v l yes no yes h l pgi<1.2v l no yes yes h l pgi<1.2v l yes yes yes h l pgi>1.2v l no no no l h pgi>1.2v l yes no no l l pgi>1.2v l no yes no h l pgi>1.2v l no no yes h l pgi>1.2v l yes yes no h l pgi>1.2v l yes no yes h l pgi>1.2v l no yes yes h l pgi>1.2v l yes yes yes h l x h x x x h l x = don?t care fpo = l means: fault is not latched fpo = h means: fault is latched pgo = l means: fault pgo = h means: no fault
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 8 sg6510x1 ? pc power supply supervisors absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v dd dc supply voltage -0.3 16 v v i input voltage pson, vs33, vs5, pgi -0.3 8.0 v fpo -0.3 16 v v out output voltage pgo -0.3 8.0 v ta operating free air temperature range -40 +85 c t stg storage temperature range -55 +150 c t l soldering temperature +260 c esd electrostatic discharge capability human body model 2 kv note: 1. stresses above those listed may cause permanent damage to the device. recommended operating conditions symbol parameter min. max. unit v dd dc supply voltage 4 15 v v il input voltage pson, vs33, vs5, pgi 7 v fpo 15 v out output voltage pgo 7 v fpo 20 i osink output sink current pgo 10 ma t r supply voltage rising time (2) 1 ms t a operating free air temperature range -30 85 c note: 2. v dd rising and falling slew rate must be less than 14v/ms.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 9 sg6510x1 ? pc power supply supervisors electrical characteristics unless otherwise noted, v dd =12v and t a =25 c. symbol parameter conditions min. typ. max. units over-voltage protection over-voltage protection vs33 3.7 3.9 4.1 over-voltage protection vs5 5.7 6.1 6.5 v ovp over-voltage protection v dd 13.2 13.8 14.4 v i lkg leakage current (fpo) v fpo = 5v 5 a v ol low-level output voltage (fpo) i sink 20ma 0.7 v t d-vddovp timing, ovp to protection 33 75 110 ms under-voltage and pgi, pgo v pgi input threshold voltage pgi 1.15 1.20 1.25 v under-voltage sense vs33 2.6 2.8 3.0 v uvs under-voltage sense vs5 4.0 4.2 4.4 v under-voltage protection vs33 2.3 2.5 2.7 v v uvp under-voltage protection vs5 3.4 3.6 3.8 t uvs timing uvs to sense (pg) 0.6 1.0 1.5 ms t uvp timing uvp to protection (fpo) 1.3 2.0 3.0 ms i lkg leakage current (pgo) pgo = 5v 5 a v ol low-level output voltage (pgo) v dd = 12v, i sink 10ma 0.7 v t uve under-voltage enable delay time 49 75 114 ms timing pg delay pgi to pgo 200 300 450 ms t pg noise deglitch time pgi to pgo 200 350 450 s pson control i pson input pull-up current pson = 0v 100 160 220 a v ih high-level input voltage 2.40 1.85 v v il low-level input voltage 1.35 1.2 v on 24 38 57 t pson timing, pson to on/off off 24 38 57 ms t psoff timing pg low to power off 1.6 2.8 4.5 ms total device i dd supply current pson = 5v/v dd = 5v 0.7 1.5 ma
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 10 sg6510x1 ? pc power supply supervisors physical dimensions 5.08 max 0.33 min 2.54 7.62 0.56 0.355 1.65 1.27 3.683 3.20 3.60 3.00 6.67 6.096 9.83 9.00 7.62 9.957 7.87 0.356 0.20 notes: unless otherwise specified a) this package conforms to jedec ms-001 variation ba b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash, and tie bar extrusions. d) dimensions and toleranc es per asme y14.5m-1994 8.255 7.61 e) drawing filename and revsion: mkt-n08frev2. (0.56) figure 5. 8-pin, dip-8 package package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 11 sg6510x1 ? pc power supply supervisors physical dimensions (continued) 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge figure 6. 8-pin sop package package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6510x1 ? rev. 1.1.1 12 sg6510x1 ? pc power supply supervisors

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